/*******************************************************************************
*              (c), Copyright 2001, Marvell International Ltd.                 *
* THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL SEMICONDUCTOR, INC.   *
* NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT  *
* OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE        *
* DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL.     *
* THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESSED,       *
* IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE.   *
********************************************************************************
* prvCpssGenDbLog.h
*       WARNING!!! this is a generated file, please don't edit it manually
* COMMENTS:
*
* FILE REVISION NUMBER:
*       $Revision: 1 $
*******************************************************************************/
#ifndef __prvCpssGenDbLogh
#define __prvCpssGenDbLogh
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#include <cpss/generic/log/cpssLog.h>
#include <cpss/generic/log/prvCpssLog.h>


/********* API fields DB *********/

extern PRV_CPSS_LOG_FUNC_PARAM_STC INOUT_GT_U32_PTR_hsuBlockMemSizePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC INOUT_GT_U32_PTR_maxRatePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC INOUT_GT_UINTPTR_PTR_iteratorPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_DP_LEVEL_ENT_dp;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_DP_LEVEL_ENT_dpLevel;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_DXCH_FDB_LEARN_PRIORITY_ENT_learnPriority;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_DXCH_MEMBER_SELECTION_MODE_ENT_selectionMode;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_DXCH_PAIR_READ_WRITE_FORM_ENT_mllPairReadForm;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_DXCH_PAIR_READ_WRITE_FORM_ENT_mllPairWriteForm;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_DXCH_PCL_PACKET_TYPE_ENT_packetType;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_DXCH_POLICER_STAGE_TYPE_ENT_stage;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_IP_PROTOCOL_STACK_ENT_ipVer;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_IP_PROTOCOL_STACK_ENT_protocolStack;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_NET_RX_CPU_CODE_ENT_cpuCode;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_PACKET_CMD_ENT_command;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_PHY_SMI_INTERFACE_ENT_smiInterface;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_PHY_XSMI_INTERFACE_ENT_xsmiInterface;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_PORTS_BMP_STC_PTR_portsMembersPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_PORT_DIRECTION_ENT_direction;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_CPSS_PORT_SPEED_ENT_speed;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_BOOL_bind;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_BOOL_enable;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_BOOL_isMember;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_BOOL_isPhysicalPort;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_BOOL_override;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_BOOL_overrideEnable;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_BOOL_reset;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_BOOL_state;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_BOOL_status;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_BOOL_valid;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_ETHERADDR_PTR_macPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_HW_DEV_NUM_hwDevNum;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_PHYSICAL_PORT_NUM_port;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_PHYSICAL_PORT_NUM_portNum;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_PORT_GROUPS_BMP_portGroupsBmp;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_PORT_NUM_port;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_PORT_NUM_portNum;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_TRUNK_ID_trunkId;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U16_data;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U16_etherType;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U16_vid;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U16_vidx;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U16_vlan;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U16_vlanId;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_baseAddr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_baseline;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_cos;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_counter;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_counterSetIndex;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_data;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_entryIndex;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_etherType;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_exp;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_group;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_index;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_laneNum;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_length;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_limit;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_mask;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_meshIdOffset;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_meshIdSize;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_mllCntSet;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_mllPairEntryIndex;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_mruSize;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_numOfDevs;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_offset;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_opcode;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_portGroupId;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_prefixLen;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_priority;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_profile;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_profileId;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_profileIndex;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_regAddr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_size;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_sourceId;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_tc;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_threshold;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_timeout;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_tmPort;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_tpidEntryIndex;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_udbIndex;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_up;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_userGroup;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_value;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U32_windowSize;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U8_PTR_devListArr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U8_PTR_hsuBlockMemPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U8_dev;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U8_devNum;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U8_entryIndex;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U8_offset;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U8_protocol;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U8_tc;
extern PRV_CPSS_LOG_FUNC_PARAM_STC IN_GT_U8_up;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_CPSS_DP_LEVEL_ENT_PTR_dpLevelPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_CPSS_DXCH_FDB_LEARN_PRIORITY_ENT_PTR_learnPriorityPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_CPSS_DXCH_MEMBER_SELECTION_MODE_ENT_PTR_selectionModePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_CPSS_NET_RX_CPU_CODE_ENT_PTR_cpuCodePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_CPSS_PACKET_CMD_ENT_PTR_commandPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_CPSS_PORTS_BMP_STC_PTR_portsMembersPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_CPSS_PORT_SPEED_ENT_PTR_speedPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_32_PTR_temperaturePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_actFinishedPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_enablePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_enabledPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_exportCompletePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_importCompletePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_isMemberPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_isReadyPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_isValidPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_overrideEnablePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_statePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_statusPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_BOOL_PTR_validPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_ETHERADDR_PTR_macPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_PTR_PTR_cookiePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_TRUNK_ID_PTR_trunkIdPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U16_PTR_dataPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U16_PTR_etherTypePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U16_PTR_vidPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U16_PTR_vlanIdPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U16_PTR_vlanPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_baselinePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_cntrPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_cosPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_counterPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_dataPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_etherTypePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_expPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_indexPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_limitPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_maskPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_maxRatePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_meshIdOffsetPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_meshIdSizePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_mllOutMCPktsPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_mruSizePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_offsetPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_opcodePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_prefixLenPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_priorityPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_profileIdPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_profileIndexPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_silentDropPktsPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_sizePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_sourceIdPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_thresholdPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_timerPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_tpidEntryIndexPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_upPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_userGroupPtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_valuePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U32_PTR_windowSizePtr;
extern PRV_CPSS_LOG_FUNC_PARAM_STC OUT_GT_U8_PTR_offsetPtr;


/********* API prototypes DB *********/

extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenEnable_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNum_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumSelectionMode_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumStageEnable_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumStageEnablePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumProtocolStackEnable_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumProtocolStackEnablePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumCpuCode_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumCommand_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumEnable_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumEnableIndex_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumEnableMeshIdOffsetMeshIdSize_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumMacPtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortEnable_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortEnablePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortNum_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortNumDirectionEnable_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortNumDirectionEnablePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortNumSpeed_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortNumEnable2_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortNumSpeedPtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortNumEnablePtr2_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortGroupsBmpIndexValid_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortGroupsBmpMllCntSetMllOutMCPktsPtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortGroupsBmpSilentDropPktsPtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortNumEnable_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortNumTpidEntryIndex_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortNumEnablePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumPortNumTpidEntryIndexPtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumBaseline_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumCounter_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumEntryIndex_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumEtherType_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumIndex_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumIndexEnable_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumIndexValue_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumIndexEnablePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumIndexValuePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumMllCntSetMllOutMCPktsPtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumSelectionModePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumCpuCodePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumCommandPtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumEnablePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumEnablePtrIndexPtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumEnablePtrMeshIdOffsetPtrMeshIdSizePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumMacPtr2_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumBaselinePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumCounterPtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumEtherTypePtr_PARAMS[];
extern PRV_CPSS_LOG_FUNC_PARAM_STC * prvCpssLogGenDevNumSilentDropPktsPtr_PARAMS[];

#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __prvCpssGenDbLogh */
